N : Negative RLO Edge Detection
| Parameter | Data Type | Memory Area | Description |
| <address> | BOOL | I, Q, M, D, L | The address specifies which edge memory bit will store the previous RLO. |
Description
The Negative RLO Edge Detection instruction detects a change from 1 to 0 (falling edge) at the specified address and indicates this by setting the RLO to 1 after the instruction. The current signal state of the RLO is compared with the signal state of the address (the edge memory bit). If the signal state of the address is 1 and the RLO prior to the instruction was 0, the RLO is 0 (pulse) after the instruction, in all other cases it is 1. The RLO prior to the instruction is stored in the address.
Status Word
| | BR | CC 1 | CC 0 | OV | OS | OR | STA | RLO | FC |
| writes | - | - | - | - | - | 0 | X | X | 1 |
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