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Evaluating the Bits of the Status Word with Integer Math


Evaluating the Bits of the Status Word with Integer Math Instructions


Description



The integer math instructions affect the following bits in the status word: CC 1 and

CC 0, OV and OS.



The following tables show the signal state of the bits in the status word for the results of instructions with Integers (16 and 32 bits):





Valid Range for the Result
CC 1
CC 0
OV
OS
0 (zero)
0
0
0
*
16 bits: -32 768 <= result < 0 (negative number)
32 bits: -2 147 483 648 <=result < 0 (negative number)
0
1
0
*
16 bits: 32 767 >= result > 0 (positive number)
32 bits: 2 147 483 647 >= result > 0 (positive number)
1
0
0
*



*    The OS bit is not affected by the result of the instruction.





Invalid Range for the Result
A1
A0
OV
OS
Underflow (addition)
16 bits: result = -65536
32 bits: result = -4 294 967 296
0
0
1
1
Underflow (multiplication)
16 bits: result < -32 768 (negative number)
32 bits: result < -2 147 483 648 (negative number)
0
1
1
1
Overflow (addition, subtraction)
16 bits: result > 32 767 (positive number)
32 bits: result > 2 147 483 647 (positive number)
0
1
1
1
Overflow (multiplication, division)
16 bits: result > 32 767 (positive number)
32 bits: result > 2 147 483 647 (positive number)
1
0
1
1
Underflow (addition, subtraction)
16 bits: result < -32. 768 (negative number)
32 bits: result < -2 147 483 648 (negative number)
1
0
1
1
Division by 0
1
1
1
1





Operation
A1
A0
OV
OS
+D:  result = -4 294 967 296
0
0
1
1
/D or MOD: division by 0
1
1
1
1

1 comments:

Tony Stark said...

Great article. Each and every point is explained in an extremely detailed way.

PLC Training in Chennai | PLC Training Institute in Chennai

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